All of you should be familiar with the dot (or other marker) used on schematic symbols to designate the “high priority” input.

The are commonly found on NANDS and NOR gates so a layout designer knows which input to connect to which gate on the series end of the CMOS gate.

Sometimes they’re designated with small circles or even letters, “A” for example.

Circuit engineers understand the full meaning of this but how many layout designers know what the significance of this marker is?

Nowadays, LVS, if your system is setup to do so, will automatically match your LVS if the layout connections are correctly attached.

As a layout engineer you need to know more than just the basics.

You need to think that there is a reason why is there a signal going to the priority gate and why the other one ( or more if more than 2 gates in series) is not.

To use an extreme example, we know a high speed clock signal is a signal that we would expect to be given priority over, let’s say, a reset signal.

Well, you would expect the CLK Signal to go the the priority gate.

If you hook it up correctly, LVS will pass and all is good, right?

Is LVS good always good?

It is if the schematics are correctly connected.

Now that you know that the CLK signal is supposed to be connected to the priority gate, if you ever see the contrary, the schematic could be (more than likely unless it is a rare condition) hooked up wrong and you, as a layout engineer ought to send a message to the circuit designer to check the connection. Don’t be brash about it, be kind.

You could write, for example,

“Hey [eng. name], Just wanted to double check if you intended the CLK signal on n65 to go to the non-priority gate. Let me know,

Thanks”.

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It is possible, contrary to popular belief 😉 that circuit engineers never make mistakes and they are demigods.

No, they put on their socks just like you do and can very well made that mistake.

The example above is maybe easy to see because of the repeating pattern, but you can be alert for this situation where ever you observe it.

I have never met an engineer who didn’t appreciate my asking him/her to double check that connection.

Reason: The circuit engineer needs to run simulations. If he runs SIM with a bad connection, he needs to rerun it. If it’s part of a very large SIM it’ll take more time to rerun.

You might save him some time and therefore, save yourself some time later so you can go on your vacation on time.

All good in layout land.

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Please like, share, follow, and/or comment. Would like to hear from you and if you have any questions I can help answer.

CKY

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