Considerations

One of the characteristics that was common in the Project Custom Reference Library (PCRL) that I developed was with guard bars (Gbar) along the adjacent edge of the NWELL, both a an Ntap bar and a Ptap bar. This is the most effective location for ESD purposes and the hardest to implement in later stages when strange ESD errors may occur because of a lack of a guard ring.

The drawback of having a guard bar at the leading edge is the layout is harder to compact. Furthermore, without Gbars and POLY used as interconnect, the cell’s primary VDD and GND will more than likely be M1. So the metal routing scheme is a major consideration. Without a Gbar, the P and N gates can connect to each other using POLY.

One of the considerations in adding the Gbar is the amount of metal interconnect expected to run across the devices between the VDD and GND bus. Interconnect run in this area would generally run in M2 (horizontal) between power rails and drop down to M1 (vertical).

Because the power and ground are running in M2, another advantage is the ability to fully contact source and drain nodes without concern for blowing up the cell height when using a M1 power scheme.

With Gbars, M1 is necessary to connect the P and N gates together, which in general is advantageous when input signal skew is a concern. With the input arriving in between the gates, instead of being fed from the outside, which is more common in compacted POLY interconnect cells, the skew of the resistance of the gate being used as a feedthrough is eliminated.

Another benefit that comes with not using poly as the default interconnect is the greater flexibility of making metal mask changes because individual gates are not slaved to their complimentary N or P.

There could be two ways of connecting to the Gbar taps. The default way would be to connect to the Ntap to the primary VDD and the Ptap to the primary GND, or, given the use of M2 routing tracks, you could dedicate separate VCC or VSS if noise isolation is a concern.

Other considerations.

The Electrical Rules and noise coupling always play a part in how you actually use your scheme. For example, the OD and Contact resistance can influence the optimum number of contacts or vias implemented. How you plan your routing to accommodate coupling or capacitance sensitive lines can determine which line need to avoid running over the top of you device rows.

As a recap, if M2 can be used as the cells horizontal routing layer, the use of Gbars at the leading edge of the NWELL and M2 as the primary VDD and GND, I see advantages for:

1. More consistent and effective Latchup and ESD protection
2. Option to connect taps to a special source to isolate device from taps.
3. Less skew on gate inputs.
4. Less resistance on source and drain due to fully contacted OD.
5. Use of M1 routing vertically, entering and exiting cell.
6. Greater flexibility when making metal only mask changes
7. Greater applicability to high speed, analog and mixed signal circuits.
8. M2 tends to be lower resistance to M1 which benefits the power grid.

Enough said, running late today….

CKY

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