IC Layout

Integrated Circuit Layout Design

Challen Yee AMS Layout Engineer

ICL 24.01 A Glance into the Past (1991)

My first job in my long career as a IC Draftsman was at Integrated Device Technology (IDT) in Santa Clara, California. The CEO was Len Perham whose favorite cars were Chevrolet Corvettes of the early 1960’s variety.

My experience at IDT over a 2 year period was spread among 3 groups. They would not hire me unless I agreed to work for two groups: Complex Logic and FCT. I would work for Complex Logic, for 4 days and then work for FCT for one 1. Honestly, I cannot remember what FCT stood for, but most of the work was related to gate array design and I had to use the CALMA system (a GE system) to do any work there, whereas, in Complex Logic I was using a Sun Micro system with Cadence EDGE.

I used to car pool with my brother, Nick, was was a veteran layout designer/manager who worked for one of the memory groups until one day, my manager, Wing Leung, very politely asked me, at the end of the work day as we were standing near the stairway on the 2nd floor of our building that led to the lobby exit, to begin putting and hour of over time, or so, per day. I was paid hourly and enjoyed the regular hours (my free time) but I decided to cooperate with my manager’s request. As a result, could no longer car pool with my brother. You could say that was the beginning of the end of regular hours for me as a professional IC draftsman.

Long story short, FCT, or Dave Hovey who was the one layout designer responsible for all of FCT layout decided he didn’t really need my assistance any more and I spent the whole week working with Complex Logic.

After a shake up involving litigation with BrookTree over some ramdac patents, the management of Complex Logic changed and I also began taking on part time responsibilities in another group called the “RISC” group. As the name implies, the RISC group was responsible for RISC Processors.

This was a good thing as eventually, the Complex Logic Group was layed off en masse when IDT decided to stop developing RAMDAC. I, however, was saved from that unfortunate blood bath as the RISC Group adopted me full time.

The work environment has changed so much since 1990. I believe people were much less paranoid about talking about different subjects. Maybe it was just that IDT seemed like a pretty fun place to work at that time in Silicon Valley’s history despite some of those late nights sleeping under the desk waiting for Dracula DRC and LVS to finish.

This whole article is a long way of supporting this resurrected photo, a very rare keepsake from a time in the industry when photographs were not common and not easily proliferated. Some of you old-timers may recognize some of the veterans from the industry in this team photo. I see a lot of old co-workers who back in the day I would consider friends.

I’m the then young dude on the left with the mustache, where I am standing next to my layout manager, Bettina Yeung. Design group manager was Raymond Chu who is standing in front with the wafer. The President of IDT is the tall guy at center back, his name was John Payne. The CAD/IT manager is standing two rows behind me, his name was Jim Gordon, who over time brought many of his team from National Semi. I could name several other people and some are missing, like Michael Ang who was one of the sharpest engineers I worked with, but I’ll keep those memories to myself for now.

Members in the photo also include the Complex Logic team which supported RISC group was before it was disbanded.

Happy Easter

CKY

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