One of the characteristics of a DAC, or any device that is intended to generate an accurate waveform from its digital inputs is the power stepping.

Schematically, there are devices whose outputs represent fractions or what I call “steps” of the output of a current source. How those devices are drawn, in order to minimize the inaccuracies of the outputs in relation to each other, requires attention to analog layout principles.

An approach I like to implement to the degree that is possible is to base all the devices used to step the output on the smallest or LSB of the design. If it is 1/16, for example, then create the 1/16 device and then an instance of that should be used as a building block for all the other 1/8, 1/4 and 1/2 output devices.

In other words, 1/8 would consist of 2x of 1/16 devices and 1/4 would be constructed of 4x sets of 1/16 devices, and 1/2 would be equal 8x of the 1/16 devices. All devices use the same cell to retaining the OD, contact patterns of the 1/16 device. This way, the effects of OD parasitics, contact resistance, birds beak, activated gate resistance are all in direct proportion to the 1/16th power device.

You would further use common central to equalize all the devices and any other dummy device and dummy pattern, and recommended well extension implementation to ensure each device is tolerant to process variations.

Below is only one of many possible combinations that would fulfill a common central theme, but DACs are often drawn without consideration to common central.

Although not every DAC requires this much attention to matching, the further the layout is from this concept, the greater the opportunity for mismatch. Note: again, this illustration above is only one floorplan of many that would work.

The amount of effort put into the layout is sometimes determined by the circuit designers preference for common central as a first order consideration. Some examples that may introduce compromise are: Total area considerations, shape of space, indivisible sizes, ability to compile by hand or by software manipulation, coupling issues, and routing limitations.

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CKY

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